1. Field of the Invention
The present invention relates to operational amplifier, in particular to an operational amplifier that is dynamically accelerated.
2. Description of Related Art
Operational amplifier (opamp in short) is an important circuit building block for numerous applications. Depending on its target application, an opamp usually needs to satisfy a list of requirements, for example: DC gain, unit-gain bandwidth, phase margin, slew-rate, and so on. Opamp is usually used in a closed-loop circuit configuration, where the overall circuit precision and linearity is determined by its DC gain, and the overall circuit speed is determined by unit-gain bandwidth (for small signal input) or slew-rate (for large signal input), while the stability of the circuit is determined by the phase margin. It is very difficult to design a high DC gain amplifier with a high unit-gain bandwidth and/or a high slew-rate while at the same time having a comfortable stability margin. To ensure good stability, compensation technique is usually employed in an opamp design. Compensation, however, reduces the unit-gain bandwidth and/or the slew rate.
An application (of operational amplifier) of particular interest pertaining to the subject matter of the present invention is switch-capacitor circuit. A typical switch-capacitor circuit works in a two-phase manner. The two phases are “sampling” phase and “transfer” phase, and their operations are controlled by a plurality of clock signals. In a typical two-phase switch-capacitor circuit working at a sampling rate of f, the duration of each phase is roughly half of the sampling clock period T=1/f. FIG. 1 depicts a circuit configuration for a typical two-phase switch capacitor circuit. During sampling phase, the input voltage VIN is sampled into the sampling capacitor C1, as shown in FIG. 1A. During transfer phase, the charge stored on the sampling capacitor C1 is transferred to the integrating capacitor C2 via the opamp circuit comprising an opamp 110, as shown in FIG. 1B. Opamp 110 is connected in an inverting amplification configuration, where the positive input terminal is connected to ground and the negative input terminal is connected to both the sampling capacitor C1 and the integrating capacitor C2. After the circuit settles in the transfer phase, the output voltage VOUT will be VIN·C1/C2. Although the switch-capacitor circuit depicted in FIG. 1B is a single-ended circuit, in practice most switch-capacitor circuits are implemented using fully differential circuits.
A typical waveform of the output voltage VOUT of the switch-capacitor circuit 100 of FIG. 1B during transfer phase is shown in FIG. 2A. Here, the transfer phase starts at time 0. The charge stored at C1 is transferred to the integrating capacitor C2. Consequently the output voltage VOUT, which is the voltage across the load capacitor CL, rises gradually and eventually settles to the final value VIN·C1/C2. Due to the finite driving capability of the opamp 110, the charge transfer process actually goes through two phases: “slewing” phase and “linear settling” phase. Initially, the output voltage VOUT rises linearly with time, no matter how large the differential input voltage at the opamp 110 is. During the duration where the output voltage increases linearly with time, opamp 110 is said to be slewing as it is driven at its maximum capacity. As the output voltage VOUT comes close enough to the final settled value VIN·C1/C2, at a time instant denoted as ts in FIG. 2, opamp 110 no longer needs to be driven at its maximum capacity. Then, the opamp enters the linear settling phase, where the output voltage VOUT increases at a slower rate than it does during the slewing phase. FIG. 2B depicts the corresponding waveform of the current IC2 flowing through the capacitor C2. During the slewing phase, the current IC2 stays at a constant value IC2MAX determined by the maximum driven capability of the opamp 110. After it enters the linear settling phase, the current IC2 exponentially decays toward zero. At the timing instant ts, the current makes a smooth transition from staying constant to delaying exponentially. The purpose of the switch-capacitor circuit 100 is to transfer the charge from the input capacitor C1 to the integrating capacitor C2. Therefore, the switch-capacitor is more efficient in slewing phase (than in linear settling phase) as the current IC2 is higher and thus the charge is transferred faster. In prior art, however, a switch-capacitor circuit during transfer phase usually spends comparable amounts of time in slewing and linear settling. Therefore, it needs to have a sufficiently high slew-rate and also a sufficiently high unit-gain bandwidth to meet the overall timing budget. As mentioned above, it is difficult to achieve both high unit-gain bandwidth and high slew rate while ensuring comfortable stability.